Details

Signal Integrity


Signal Integrity

From High-Speed to Radiofrequency Applications
1. Aufl.

von: Fabien Ndagijimana

139,99 €

Verlag: Wiley
Format: EPUB
Veröffentl.: 02.06.2014
ISBN/EAN: 9781118649206
Sprache: englisch
Anzahl Seiten: 176

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Beschreibungen

<p>This book presents the necessary concepts for the design and testing of radiofrequency and high-speed circuits. Signal and propagation theory is presented for the various circuit levels, from the chip to the PCB. The co-existence of high-speed wideband signals of radiofrequency signals and supply circuits is developed in order to provide design rules for engineers and Masters-level students. The subjects covered include: interconnections and signal integrity; spectral analysis techniques for high-speed signals; design techniques for signal integrity; the transmission-line concept; methods for temporal analysis and techniques for frequency domain analysis for connectics.</p>
<p>INTRODUCTION ix</p> <p><b>CHAPTER 1. DEGRADATION OF RISE TIME IN INTERCONNECTS 1</b></p> <p>1.1. Propagation issues in interconnects 1</p> <p>1.1.1. Evolution of digital circuits 1</p> <p>1.1.2. Evolution of signals in interconnects 2</p> <p>1.1.3. Propagation time on networks 4</p> <p>1.1.4. Propagation delay in integrated circuits 5</p> <p>1.1.5. Spectral analysis of signals 6</p> <p>1.2. Behavior of components at high frequencies 7</p> <p>1.2.1. Contact wire behavior 7</p> <p>1.2.2. Resistance behavior at radiofrequencies (RF) 8</p> <p>1.2.3. RF inductance behavior 8</p> <p>1.2.4. Capacitance behavior at RF 9</p> <p>1.2.5. Effects of losses due to conductors: skin effect 11</p> <p>1.3. Effect on transmission of signals on interconnects 13</p> <p>1.3.1. Filtering by transmission channel 13</p> <p>1.3.2. Degradation of rise time in a limited-bandwidth channel 14</p> <p>1.3.3. Example of a first-order low-pass RC filter 15</p> <p>1.3.4. Effects of resistive losses from skin effect 16</p> <p>1.3.5. Rise time in cascading circuits 17</p> <p>1.3.6. Transmission quality criteria: eye diagram 19</p> <p>1.4. Measurement of rise time 19</p> <p>1.4.1. Different definitions of rise time 19</p> <p>1.4.2. Measurement principle 20</p> <p>1.4.3. Effect of measuring sensor 20</p> <p>1.5. Conclusion 21</p> <p><b>CHAPTER 2. ELECTROMAGNETIC MODELING OF INTERCONNECTS 23</b></p> <p>2.1. Global modeling of signal integrity 23</p> <p>2.1.1. ICEM and ICIM models 23</p> <p>2.1.2. IBIS models 24</p> <p>2.1.3. I/V characteristics of buffers 25</p> <p>2.1.4. I/V characteristics of the IBIS model 25</p> <p>2.2. RC interconnect model 27</p> <p>2.2.1. RC model 27</p> <p>2.2.2. The Elmore constant 28</p> <p>2.3. Capacitive and inductive modeling 28</p> <p>2.3.1. Capacitive modeling 29</p> <p>2.3.2. Inductive modeling 30</p> <p>2.4. LC line modeling 35</p> <p>2.5. Application to electronic packages and MCM 37</p> <p>2.5.1. Different types of electronic packages 37</p> <p>2.5.2. Multichip modules 39</p> <p>2.5.3. LC modeling of packages 40</p> <p>2.5.4. 2.5D and 3D electromagnetic simulations 43</p> <p>2.6. Conclusion 45</p> <p><b>CHAPTER 3. CONTROLLED IMPEDANCE INTERCONNECTS 47</b></p> <p>3.1. Why control impedance? 47</p> <p>3.1.1. Effect of interconnect length 47</p> <p>3.1.2. Classification of interconnects by the signal carried 51</p> <p>3.2. Influence of rise time on signal degradation 52</p> <p>3.3. Model of a controlled impedance interconnect 53</p> <p>3.3.1. Characteristic impedance: definition 53</p> <p>3.3.2. Configuration of controlled impedance interconnects 54</p> <p>3.4. Interconnects on PCBs 55</p> <p>3.4.1. Controlled impedance on PCB 55</p> <p>3.4.2. Transition between lines and discontinuity 57</p> <p>3.4.3. Extraction of values from equivalent schema 60</p> <p>3.5. Impedance control for a microstrip configuration 61</p> <p>3.5.1. Effect of effective permittivity 61</p> <p>3.5.2. Limitations on a typical digital circuit 62</p> <p>3.5.3. Effect of ribbon thickness or protective resin 63</p> <p>3.6. Analysis of propagation in interconnects 64</p> <p>3.6.1. Reflection and transmission on termination 64</p> <p>3.6.2. Reflection and transmission during an impedance break 65</p> <p>3.6.3. Reflection and transmission on a bus 66</p> <p>3.7. Effect on data bus configuration 68</p> <p>3.8. Application to clock distribution 69</p> <p>3.9. Conclusion 71</p> <p><b>CHAPTER 4. PROPAGATION ON TRANSMISSION LINES 73</b></p> <p>4.1. Transmission line model 73</p> <p>4.1.1. Modes of propagation on lines 74</p> <p>4.2. Propagation modes related to substrate 76</p> <p>4.2.1. Quasi-TEM mode 77</p> <p>4.2.2. Skin-effect mode 78</p> <p>4.2.3. Slow wave mode 79</p> <p>4.2.4. Transition zone 80</p> <p>4.3. Equation of propagation on transmission lines 81</p> <p>4.3.1. Propagation equation 82</p> <p>4.3.2. Input impedance 85</p> <p>4.3.3. Interconnect behavior according to length and loads 85</p> <p>4.3.4. Case of electrically short lines 86</p> <p>4.4. Conclusion 87</p> <p><b>CHAPTER 5. THE S-PARAMETERS TESTING TECHNIQUE 89</b></p> <p>5.1. Definition of measured parameters 89</p> <p>5.1.1. Reflection and transmission 89</p> <p>5.1.2. Reflection coefficient and SWR on interconnects 90</p> <p>5.2. The S-parameters principle 92</p> <p>5.2.1. Definitions 92</p> <p>5.2.2. Input impedance of a circuit terminated by an impedance 93</p> <p>5.3. Measurement of S parameters 94</p> <p>5.3.1. Standard calibrations of a vectorial analyzer 96</p> <p>5.3.2. Short-open-load-thru (SOLT) calibration 96</p> <p>5.3.3. Thru-Reflect-Line (TRL) calibration 98</p> <p>5.3.4. One-port measurement technique 99</p> <p>5.4. Measurement of characteristic line impedance 100</p> <p>5.4.1. Short-circuit and open-circuit method 100</p> <p>5.4.2. R0-loaded line method 102</p> <p>5.4.3. Equivalent line based on S parameters 103</p> <p>5.5. Measurement of line capacitance 104</p> <p>5.5.1. Short-circuit and open-circuit measurement method 104</p> <p>5.5.2. Loaded line measurement method 104</p> <p>5.6. Components on PCB and de-embedding techniques 105</p> <p>5.6.1. Impedance measurement on PCB 106</p> <p>5.6.2. T and C series matrices 106</p> <p>5.6.3. ABCD matrix of a transmission line 107</p> <p>5.6.4. De-embedding procedure 109</p> <p>5.7. Characterization of dielectric materials for interconnects 111</p> <p>5.7.1. Metal–insulating material–metal capacity method for insulating materials in integrated technologies 111</p> <p>5.7.2. Effective permittivity of a transmission line 113</p> <p>5.7.3. Case of microribbon, tri-plate or coplanar lines 114</p> <p>5.8. Conclusion 115</p> <p><b>CHAPTER 6. TIME-DOMAIN REFLECTOMETRY ANALYSIS 117</b></p> <p>6.1. Principle of TDR 117</p> <p>6.2. Reflection and transmission of voltage 118</p> <p>6.2.1. Observable voltages 118</p> <p>6.2.2. Effects of multiple reflections in high-speed circuits 120</p> <p>6.3. Measurement of characteristic impedance 120</p> <p>6.3.1. Impedance measurement with an impulse generator 120</p> <p>6.3.2. Impedance measurement with an echelon 122</p> <p>6.3.3. Case of cascaded impedances 123</p> <p>6.4. Reflection on reactive loads 124</p> <p>6.5. Extraction of equivalent schemas 125</p> <p>6.5.1. Definition of equivalent schema 125</p> <p>6.5.2. Extraction of an inductive discontinuity or component 127</p> <p>6.5.3. Case of a capacitive discontinuity or component 129</p> <p>6.5.4. Case of a series inductance and parallel capacitance 131</p> <p>6.6. Discontinuities in cascade 133</p> <p>6.6.1. Spatial resolution 133</p> <p>6.6.2. Example of inductance and capacitance extraction 133</p> <p>6.7. Conclusion 135</p> <p><b>CHAPTER 7. INTERFERENCE AND CROSS-TALK IN INTERCONNECTS 137</b></p> <p>7.1. Coupling and interferences due to substrate 137</p> <p>7.1.1. ICEM model for substrate coupling 138</p> <p>7.1.2. Guard ring and insulation well 140</p> <p>7.2. Theory of coupling between lines 140</p> <p>7.2.1. Interline coupling model 141</p> <p>7.2.2. Coupling signals at endings 144</p> <p>7.2.3. Model of coupling in interconnects on PCB 145</p> <p>7.3. Application to high-speed cables, buses and connectors 150</p> <p>7.3.1. Stresses in high-speed buses 150</p> <p>7.3.2. Standardization of data transmission cables 151</p> <p>7.3.3. Categories of high-speed ethernet systems 153</p> <p>7.4. Conclusion 155</p> <p>BIBLIOGRAPHY 157</p> <p>INDEX 159</p>
<p><strong>Fabien Ndagijimana</strong> is Professor at Minatec, Grenoble, France.

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