Table of Contents
Cover
About the Authors
Preface
Acknowledgments
Chapter 1: Overview of High‐voltage Converters
1.1 Introduction
1.2 Classification of High‐voltage High‐Power Converters
1.3 Topologies of Multilevel Converters
1.4 Modulation Methods of Multilevel Converter
1.5 Architecture of Multi‐terminal High‐voltage Converter
1.6 Arrangement of this Book
References
Chapter 2: Multiple‐Bridge‐Module High‐voltage Converters
2.1 Introduction
2.2 Configuration of Bridge Module
2.3 Single‐Phase Half‐Bridge‐Module High‐voltage Converter
2.4 Three‐Phase Half‐Bridge‐Module High‐voltage Converter
2.5 Three‐Phase Four‐Leg Half‐Bridge‐Module High‐voltage Converter
2.6 Full‐Bridge‐Module High‐voltage Converter
2.7 Advantages of Multiple‐Bridge‐Module Converter
2.8 Summary
References
Chapter 3: Single‐Input Multiple‐Output High‐voltage DC–AC Converters
3.1 Introduction
3.2 Single‐Input Dual‐Output Half‐Bridge Single‐Phase DC–AC Converter
3.3 Single‐Input Dual‐Output Full‐Bridge Single‐Phase DC–AC Converter
3.4 Single‐Input Dual‐Output Three‐Phase DC–AC Converter
3.5 Single‐Input Multiple‐Output Half‐Bridge Single‐Phase DC–AC Converter
3.6 Single‐Input Multiple‐Output Full‐Bridge Single‐Phase DC–AC Converter
3.7 Single‐Input Multiple‐Output Three‐Phase DC–AC Converter
3.8 Summary
References
Chapter 4: Multiple‐Input Single‐Output High‐voltage AC–DC Converters
4.1 Introduction
4.2 Single‐Phase Three‐Arm Dual‐Input Single‐Output AC–DC Converter
4.3 Single‐Phase Six‐Arm Dual‐Input Single‐Output AC–DC Converter
4.4 Three‐Phase Nine‐Arm Dual‐Input Single‐Output AC–DC Converter
4.5 Single‐Phase M‐Arm Multiple‐Input Single‐Output AC–DC Converter
4.6 Single‐Phase 2M‐Arm Multiple‐Input Single‐Output AC–DC Converter
4.7 Three‐Phase 3M‐Arm Multiple‐Input Single‐Output AC–DC Converter
4.8 Summary
References
Chapter 5: Multiple‐Input Multiple‐Output High‐voltage AC–AC Converters
5.1 Introduction
5.2 Single‐Phase Single‐Input Single‐Output AC–AC Converter
5.3 Three‐Phase Single‐Input Single‐Output AC–AC Converter
5.4 Single‐Phase Multiple‐terminal AC–AC Converter
5.5 Three‐Phase Multiple‐terminal AC–AC Converter
5.6 Summary
References
Chapter 6: Multiple‐terminal High‐voltage DC–DC Converters
6.1 Introduction
6.2 Single‐Input Dual‐Output DC–DC Converter
6.3 Single‐Input Multiple‐Output DC–DC Converter
6.4 Multiple‐Input Multiple‐Output DC–DC Converter
6.5 Summary
References
Chapter 7: Multiple‐terminal High‐voltage Hybrid Converters
7.1 Introduction
7.2 Six‐Arm Hybrid Converter with Single‐Phase AC Input
7.3 Nine‐Arm Hybrid Converter with Three‐Phase AC Input
7.4 Multiple‐Arm Hybrid Converter
7.5 Summary
References
Chapter 8: Short‐Circuit Protection for High‐voltage Converters
8.1 Introduction
8.2 Modular DC Circuit Breaker
8.3 Sub‐Modules with DC Fault‐Handling Capability
8.4 Configuration of the Hybrid Multi‐terminal High‐voltage Converter
8.5 Summary
References
Chapter 9: Common Techniques and Applications of Multi‐terminal High‐voltage Converters
9.1 Introduction
9.2 Capacitor Voltage Control Scheme for Multi‐terminal High‐voltage Converters
9.3 Applications of Multi‐terminal High‐voltage Converter
9.4 Summary
References
Index
End User License Agreement
List of Tables
Chapter 01
Table 1.1 Phase voltage of the 5L‐NPC converter and its corresponding switch combinations.
Table 1.2 Phase voltage of the 5L‐FC converter and its corresponding switch combinations.
Table 1.3 Output voltage of the H‐bridge unit and its corresponding switch combinations.
Table 1.4 Output voltage of the cascaded H‐bridge converter when
N = 2
.
Table 1.5 Operating states of the HBSM.
Table 1.6 Operating states of the FBSM.
Table 1.7 Phase voltage of the 3L‐ANPC converter and its corresponding switch combinations.
Table 1.8 Phase voltage of the 5L ANPC+FC converter and its corresponding switch combinations.
Chapter 02
Table 2.1 Switching states and terminal voltages of SP‐HBM.
Table 2.2 Switching states and terminal voltages of SP‐FBM.
Table 2.3 Voltage ratios of single‐phase half‐bridge‐module DC–AC converter.
Table 2.4 Operating modes of single‐phase half‐bridge‐module DC–AC converter when
N = 2
.
Table 2.5 Voltages of three‐phase half‐bridge‐module DC–AC converter when
N = 2
.
Table 2.6 Comparison between MMC and MBMC.
Chapter 03
Table 3.1 Modulating reference of the single‐input three‐output full‐bridge single‐phase DC–AC converter.
Table 3.2 Modulating reference of the proposed single‐input three‐output three‐phase DC–AC converter.
Chapter 04
Table 4.1 Parameters of the single‐phase three‐arm dual‐input single‐output AC–DC converter.
Table 4.2 Parameters of the single‐phase six‐arm dual‐input single‐output AC–DC converter in the EF′ mode.
Table 4.3 Parameters of the single‐phase six‐arm dual‐input single‐output AC–DC converter in the DF mode.
Table 4.4 Parameters of the three‐phase nine‐arm dual‐input single‐output AC–DC converter.
Table 4.5 Parameters of the single‐phase four‐arm multiple‐input single‐output AC–DC converter.
Table 4.6 Parameters of the single‐phase eight‐arm three‐input single‐output AC–DC converter.
Table 4.7 Parameters of the three‐phase 12-arm three-input single‐output AC–DC converter.
Chapter 05
Table 5.1 Parameters of the proposed single‐phase single‐input single‐output AC–AC converter.
Table 5.2 Parameters of the proposed three‐phase single‐input single‐output AC–AC converter.
Table 5.3 Parameters of the proposed single‐phase multiple‐terminal AC–AC converter.
Table 5.4 Parameters of the proposed three‐phase multiple‐terminal AC–AC converter.
Chapter 06
Table 6.1 Parameters of the proposed single‐input dual‐output DC–DC converter.
Table 6.2 Parameters of the proposed single‐input multiple‐output DC–DC converter.
Table 6.3 Parameters of the proposed dual‐input dual‐output DC–DC converter.
Chapter 07
Table 7.1 Parameters of the six‐arm hybrid converter with single‐phase AC input.
Table 7.2 Parameters of the nine‐arm hybrid converter with three‐phase AC input.
Chapter 09
Table 9.1 Simulation parameters of the prototype.
List of Illustrations
Chapter 01
Figure 1.1 Schematic of power grid. (a) Traditional power grid. (b) Smart grid.
Figure 1.2 Application of multilevel converters in smart grid.
Figure 1.3 High‐power two‐level voltage source inverter. (a) Topology. (b) Bipolar PWM scheme.
Figure 1.4 Typical stepped waveform of multilevel converter.
Figure 1.5 High‐voltage converters classification.
Figure 1.6 Phase structure of the NPC converter. (a) Three level. (b) Five level.
Figure 1.7 Phase structure of the FC converter. (a) Three level. (b) Five level.
Figure 1.8 Phase structure of the cascaded H‐bridge converter.
Figure 1.9 Phase structure of MMC.
Figure 1.10 Circuit configurations of sub‐module. (a) HBSM. (b) FBSM.
Figure 1.11 Phase structure of the 3L‐ANPC converter.
Figure 1.12 Phase structure of an NPC+CHB converter.
Figure 1.13 Phase structure of an FC+CHB converter.
Figure 1.14 Phase structure of an ANPC+FC converter.
Figure 1.15 Classification of multilevel converter modulation methods.
Figure 1.16 Modulation principle of CPS‐PWM.
Figure 1.17 Modulation principle of different CD‐PWMs. (a) PD‐PWM. (b) POD‐PWM. (c) APOD‐PWM.
Figure 1.18 Multilevel waveform under SHE‐PWM.
Figure 1.19 Multilevel waveform under NLC.
Figure 1.20 Outputs of a seven‐level CHB under hybrid modulation.
Figure 1.21 Architecture of a multi‐terminal high‐voltage converter.
Figure 1.22 Five‐leg inverter.
Figure 1.23 Nine‐switch inverter.
Figure 1.24 Dual two‐phase inverter.
Chapter 02
Figure 2.1 Single‐phase half‐bridge module. (a) Capacitor in leg
a
. (b) Capacitor in leg
b
.
Figure 2.2 Three‐phase half‐bridge module.
Figure 2.3 Three‐phase four‐leg half‐bridge module.
Figure 2.4 Full‐bridge modules. (a) Single‐phase full‐bridge module. (b) Three‐phase full‐bridge module. (c) Three‐phase four‐leg full‐bridge module.
Figure 2.5 Single‐phase half‐bridge‐module DC–AC converter.
Figure 2.6 Schematic of single‐phase half‐bridge‐module DC–AC converter when
N = 2
.
Figure 2.7 Typical waveforms of single‐phase half‐bridge‐module DC–AC converter when
N = 2
. (a) Staircase modulation. (b) Carrier‐based PWM.
Figure 2.8 Simulation waveforms of single‐phase half‐bridge‐module DC–AC converter with
N = 2
by using staircase modulation scheme. (a)
u
o
,
u
ao
, and
u
bo
. (b) Terminal voltages of the bridge modules.
Figure 2.9 Simulation waveforms of single‐phase half‐bridge‐module DC–AC converter with
N = 2
by using carrier‐based PWM scheme. (a) Frequency ratio
f
s
/
f
r
=10. (b) Frequency ratio
f
s
/
f
r
=100.
Figure 2.10 Simplified single‐phase half‐bridge module. (a) Type I. (b) Type II.
Figure 2.11 Three‐phase half‐bridge‐module DC–AC converter.
Figure 2.12 Schematic of three‐phase half‐bridge‐module DC–AC converter with
N = 2
.
Figure 2.13 Simulation waveforms of three‐phase half‐bridge‐module DC–AC converter (
N = 2
) by using staircase modulation scheme. (a)
u
uo
,
u
up1
,
u
up2
,
u
un1
, and
u
un2
. (b)
u
vo
,
u
vp1
,
u
vp2
,
u
vn1
, and
u
vn2
. (c) Phase voltages and line voltages.
Figure 2.14 Three‐phase four‐leg half‐bridge‐module DC–AC converter.
Chapter 03
Figure 3.1 Single‐input dual‐output half‐bridge single‐phase DC–AC converter.
Figure 3.2 Half‐bridge sub‐module.
Figure 3.3 Relationship between carrier signals and reference signals of the single‐input dual‐output half‐bridge single‐phase DC–AC converter. (a) DF mode. (b) EF mode. (c) EF′ mode.
Figure 3.4 Control schematic of the single‐input dual‐output half‐bridge single‐phase DC–AC converter.
Figure 3.5 Simulation waveforms of the single‐input dual‐output half‐bridge single‐phase DC–AC converter. (a) EF mode. (b) DF mode.
Figure 3.6 Single‐input dual‐output full‐bridge single‐phase DC–AC converter.
Figure 3.7 Relationship between carrier signals and reference signals of the single‐input dual‐output full‐bridge single‐phase DC–AC converter. (a) DF mode. (b) EF′ mode.
Figure 3.8 Simulation waveforms of the single‐input dual‐output full‐bridge single‐phase DC–AC converter. (a) EF′ mode. (b) DF mode.
Figure 3.9 Single‐input dual‐output three‐phase DC–AC converter.
Figure 3.10 Simulation waveforms of the single‐input dual‐output three‐phase DC–AC converter. (a) EF′ mode. (b) DF mode.
Figure 3.11 Single‐input multiple‐output half‐bridge single‐phase DC–AC converter.
Figure 3.12 Control scheme for the single‐input multiple‐output half‐bridge single‐phase DC–AC converter.
Figure 3.13 Relationship between carrier signal and three reference signals under different operating modes. (a) EF′. (b) DF.
Figure 3.14 Simulation waveforms of the single‐input three‐output half‐bridge single‐phase DC–AC converter. (a) EF′ mode. (b) DF mode.
Figure 3.15 Single‐input multi‐output full‐bridge single‐phase DC–AC converter.
Figure 3.16 Simulation waveforms of the single‐input three‐output full‐bridge single‐phase DC–AC converter. (a) EF′ mode. (b) DF mode.
Figure 3.17 Single‐input multi‐output three‐phase DC–AC converter.
Figure 3.18 Simulation waveforms of the proposed single‐input three‐output three‐phase DC–AC converter. (a) EF′ mode. (b) DF mode.
Chapter 04
Figure 4.1 Single‐phase three‐arm dual‐input single‐output AC–DC converter.
Figure 4.2 Simulation waveforms of the proposed single‐phase three‐arm dual‐input single‐output AC–DC converter in DF mode. (a) Waveforms of reference signals, input, and output voltages. (b) Waveforms of
u
L
+
u
M
−
u
U
and
u
1
,
u
L
−
u
M
−
u
U
and
u
2
. (c) Spectrums of
u
L
+
u
M
−
u
U
and
u
1
,
u
L
−
u
M
−
u
U
and
u
2
.
Figure 4.3 Simulation waveforms of the proposed single‐phase three‐arm dual‐input single‐output AC–DC converter in EF′ mode. (a) Waveforms of reference signals, input, and output voltages. (b) Waveforms of
u
L
+
u
M
−
u
U
and
u
1
,
u
L
−
u
M
−
u
U
and
u
2
. (c) Spectrums of
u
L
+
u
M
−
u
U
and
u
1
,
u
L
−
u
M
−
u
U
and
u
2
.
Figure 4.4 Single‐phase six‐arm dual‐input single‐output AC–DC converter.
Figure 4.5 Simulation waveforms of the proposed single‐phase six‐arm dual‐input single‐output AC–DC converter in the EF′ mode. (a) Waveforms of group #1. (b) Spectrums of group #1. (c) Waveforms of group #2. (d) Spectrums of group #2. (e) Waveforms of group #3. (f) Spectrums of group #3.
Figure 4.6 Simulation waveforms of the proposed single‐phase six‐arm dual‐input single‐output AC–DC converter in the DF mode. (a) Waveforms. (b) Spectrums.
Figure 4.7 Three‐phase nine‐arm dual‐input single‐output AC–DC converter.
Figure 4.8 Simulation waveforms of the proposed three‐phase nine‐arm dual‐input single‐output AC–DC converter in the DF mode. (a) Waveforms. (b) Spectrums.
Figure 4.9 Single‐phase M‐arm multiple‐input single‐output AC–DC converter.
Figure 4.10 Simulation waveforms of the proposed single‐phase four‐arm three‐input single‐output AC–DC converter in the DF mode. (a) Input voltages, output voltage, and reference voltages. (b) Switching-arm voltage combinations. (c) Spectrums of switching-arm voltage combinations.
Figure 4.11 Simulation waveforms of the proposed single‐phase four‐arm three‐input single‐output AC–DC converter in the EF′ mode. (a) Input voltages, output voltage, and reference voltages. (b) Switching-arm voltage combinations. (c) Spectrums of switching-arm voltage combinations.
Figure 4.12 Single‐phase 2M‐arm multiple‐input single‐output AC–DC converter.
Figure 4.13 Simulation waveforms of the proposed single‐phase eight‐arm three‐input single‐output AC–DC converter in the DF mode. (a) Input voltages, output voltage, and reference voltages. (b) Voltages of three input branches. (c) Spectrums of (b).
Figure 4.14 Simulation waveforms of the proposed single‐phase eight‐arm three‐input single‐output AC–DC converter in the EF′ mode. (a) Input voltages, output voltage, and reference voltages. (b) Switching arm voltage combinations. (c) Spectrums of (b).
Figure 4.15 Three‐phase 3M‐arm multiple‐input single‐output AC–DC converter.
Figure 4.16 Simulation waveforms of the proposed three‐phase 12‐arm three‐input single‐output AC–DC converter in the DF mode. (a) Input voltages, output voltage, and reference voltages. (b) Voltages between general phase units and input line voltages. (c) Spectrums of (b).
Chapter 05
Figure 5.1 Single‐phase single‐input single‐output AC–AC converter.
Figure 5.2 Single‐phase single‐input single‐output AC–AC converter with half‐bridge sub‐module.
Figure 5.3 Simulation waveforms of the proposed single‐phase single‐input single‐output AC–AC converter in the DF mode. (a) Time‐domain waveforms. (b) Spectrum of
u
i
,
u
o
and total switching arm voltage.
Figure 5.4 Simulation waveforms of the proposed single‐phase single‐input single‐output AC–AC converter in the EF′ mode. (a) Time‐domain waveforms. (b) Spectrum of
u
i
,
u
o
and total switching arm voltage.
Figure 5.5 Three‐phase single‐input single‐output AC–AC converter.
Figure 5.6 Simulation waveforms of the proposed three‐phase single‐input single‐output AC–AC converter in Case 1. (a) Time‐domain waveforms. (b) Spectrums.
Figure 5.7 Simulation waveforms of the proposed three‐phase single‐input single‐output AC–AC converter in Case 2. (a) Time‐domain waveforms. (b) Spectrums.
Figure 5.8 Single‐phase multiple‐terminal AC–AC converter.
Figure 5.9 Simulation waveforms of the proposed single‐phase dual‐input single‐output AC–AC converter in the EF′ mode. (a) Time‐domain waveforms. (b) Spectrums.
Figure 5.10 Simulation waveforms of the proposed single‐phase single‐input dual‐output AC–AC converter in the EF′ mode. (a) Time‐domain waveforms. (b) Spectrums.
Figure 5.11 Simulation waveforms of the proposed single‐phase dual‐input single‐output AC–AC converter in the DF mode. (a) Time‐domain waveforms. (b) Spectrums.
Figure 5.12 Simulation waveforms of the proposed single‐phase single‐input dual‐output AC–AC converter in the DF mode. (a) Time‐domain waveforms. (b) Spectrums.
Figure 5.13 Three‐phase multiple‐input multiple‐output AC–AC converter.
Figure 5.14 Simulation waveforms of the proposed three‐phase dual‐input single‐output AC–AC converter. (a) Time‐domain waveforms. (b) Spectrums.
Figure 5.15 Simulation waveforms of the proposed three‐phase single‐input dual‐output AC–AC converter. (a) Time‐domain waveforms. (b) Spectrums.
Chapter 06
Figure 6.1 Single‐input dual‐output DC–DC converter.
Figure 6.2 Different configurations of the single‐input dual‐output DC–DC converter. (a)
T
1
is the input terminal. (b)
T
2
is the input terminal. (c)
T
3
is the input terminal.
Figure 6.3 Control schematic of the single‐input dual‐output DC–DC converter. (a) Typical reference signals. (b) CPS‐PWM scheme.
Figure 6.4 Simulation waveforms of the proposed single‐input dual‐output DC–DC converter. (a) Case 1,
T
1
is the input terminal. (b) Case 2,
T
2
is the input terminal. (c) Case 3,
T
3
is the input terminal.
Figure 6.5 Single‐input multiple‐output DC–DC converter.
Figure 6.6 Control schematic for the single‐input multiple‐output DC–DC converter.
Figure 6.7 Simulation waveforms of the proposed single‐input multiple‐output DC–DC converter. (a) Case 1,
T
1
is the input terminal. (b) Case 2,
T
4
is the input terminal.
Figure 6.8 A dual‐input dual‐output DC–DC converter.
Figure 6.9 Simulation waveforms of the proposed dual‐input dual‐output DC–DC converter. (a) Case 1. (b) Case 2. (c) Case 3.
Chapter 07
Figure 7.1 Six‐arm hybrid converter with single‐phase AC input.
Figure 7.2 Relationship between the carrier signals and the reference signals of the six‐arm hybrid converter with single‐phase AC input.
Figure 7.3 Simulation waveforms of the proposed six‐arm hybrid converter with single‐phase AC input. (a) Equal DC inputs. (b) Different DC inputs.
Figure 7.4 Nine‐arm hybrid converter with three‐phase AC input.
Figure 7.5 Simulation waveforms of the proposed nine‐arm hybrid converter with equal input DC sources. (a) Waveforms. (b) Spectrum of
u
U3
+
u
U2
−
u
U1
.
Figure 7.6 Simulation waveforms of the proposed nine‐arm hybrid converter with different input DC sources. (a) Waveforms. (b) Spectrums of
u
U3
+
u
U2
−
u
U1
and
u
U3
−
u
U2
−
u
U1.
Figure 7.7 Multiple‐arm hybrid converter with single‐phase AC input.
Figure 7.8 Multiple‐arm hybrid converter with three‐phase AC input.
Figure 7.9 Relationship between the carrier signals and the reference signals of the multiple‐arm hybrid converter.
Chapter 08
Figure 8.1 Short‐circuit fault of MMC‐HVDC system with HBSMs.
Figure 8.2 Topology of modular DC circuit breaker.
Figure 8.3 Modular DC circuit breaker with N = 2. (a) Equivalent circuit. (b) Normal operating mode.
Figure 8.4 Operating process of modular DC CB when a DC short‐circuit fault happens. (a) Mode 1. (b) Mode 2. (c) Mode 3. (d) Mode 4. (e) Mode 5. (f) Mode 6.
Figure 8.5 Full‐bridge sub‐module and its current path when all switches are OFF. (a) Schematic. (b)
i
SM
> 0
. (c)
i
SM
< 0
.
Figure 8.6 Short‐circuit fault of MMC‐HVDC system with FBSMs.
Figure 8.7 Topology of clamp‐double sub‐module.
Figure 8.8 Current paths of clamp‐double sub‐module in normal operation. (a) Capacitors bypassed. (b) Capacitors inserted.
Figure 8.9 Current paths of clamp‐double sub‐module when all switches are OFF. (a)
i
SM
> 0
. (b)
i
SM
< 0
.
Figure 8.10 Topology of unipolar-voltage sub‐module.
Figure 8.11 Current paths of unipolar-voltage sub‐module in normal operation. (a) Capacitor inserted. (b) Capacitor bypassed.
Figure 8.12 Current paths of unipolar-voltage sub‐module when all switches are OFF. (a)
i
SM
> 0
. (b)
i
SM
< 0
.
Figure 8.13 Topology of cross‐connected sub‐module.
2
U
C
−2
U
C
C
1
U
C
C
2
U
C
C
1
−
U
C
C
2
−
U
C
T
1
T
4
T
6
T
2
T
3
T
5
Figure 8.15 Current paths of cross‐connected sub‐module when all switches are OFF. (a)
i
SM
> 0
. (b)
i
SM
< 0
.
Figure 8.16 Topology of series‐connected double sub‐module.
Figure 8.17 Current paths of series‐connected double sub‐module in normal operation. (a) Capacitor
C
1
inserted. (b) Capacitor
C
2
inserted. (c) Capacitors
C
1
and
C
2
inserted. (d) Capacitors bypassed.
Figure 8.18 Current paths of series‐connected double sub‐module when all switches are OFF. (a)
i
SM
> 0
. (b)
i
SM
< 0
.
Figure 8.19 Block diagrams of hybrid multi‐terminal high‐voltage converter. (a) FBSMs on the switching arm. (b) FBSMs on the AC side. (c) FBSMs on the DC side.
Chapter 09
Figure 9.1 Voltage balancing control signal for the single‐input dual‐output half‐bridge single‐phase DC–AC converter.
Figure 9.2 Complete control schematic for the single‐input dual‐output DC–AC converter.
Figure 9.3 Simulation waveforms of the proposed capacitor voltage control scheme for single‐input dual‐output half‐bridge single‐phase DC–AC converter.
Figure 9.4 Schematic of generating the closed‐loop control signal for the single‐input dual‐output single‐phase and three‐phase DC–AC converters.
Figure 9.5 Complete control schematic of the single‐input dual‐output single‐phase and three‐phase DC–AC converters.
Figure 9.6 Simulation waveforms of the proposed capacitor voltage control scheme for the single‐input dual‐output three‐phase DC–AC converter. (a) The line voltages and line currents of the loads #1 and #2. (b) SM capacitor voltages of phase u. (c) SM capacitor voltages of phase v. (d) SM capacitor voltages of phase w.
Figure 9.7 Equivalent models of single‐phase 2M‐arm multiple‐input single‐output AC–DC converter. (a) Equivalent circuit model. (b) Decoupled circuit model.
Figure 9.8 Current distribution of the single‐phase 2M‐arm multiple‐input single‐output AC–DC converter.
Figure 9.9 Schematic of generating the closed‐loop capacitor control signal for the single‐phase 2M‐arm multiple‐input single‐output AC–DC converter.
Figure 9.10 Complete control schematic of the single‐phase 2M‐arm multiple‐input single‐output AC–DC converter.
Figure 9.11 Simulation waveforms of the single‐phase 2M‐arm multiple‐input single‐output AC–DC converter. (a) With the decoupling control scheme only. (b) Without the capacitor voltage control scheme. (c) With the capacitor voltage control scheme.
Figure 9.12 Framework of connecting multiple wind turbines to a DC bus.
Figure 9.13 Framework of connecting multiple wind turbines to an AC bus.
Figure 9.14 Framework of driving multiple AC motors by a DC bus.
Figure 9.15 Framework of driving multiple AC motors by an AC bus.
Guide
Cover
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