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<p>Contributors xi</p> <p>Preface xiii</p> <p><b>I Transceiver Concepts and Design 1</b></p> <p><b>1 Software-Defined Radio Front Ends 3<br /> </b><i>Jan Craninckx</i></p> <p>1.1 Introduction 3</p> <p>1.2 System-Level Considerations 4</p> <p>1.3 Wideband LO Synthesis 5</p> <p>1.4 Receiver Building Blocks 12</p> <p>1.5 Transmitter Building Blocks 23</p> <p>1.6 Calibration Techniques 25</p> <p>1.7 Full SDR Implementation 27</p> <p>1.8 Conclusions 30</p> <p>References 30</p> <p><b>2 Software-Defined Transceivers 33<br /> </b><i>Gio Cafaro and Bob Stengel</i></p> <p>2.1 Introduction 33</p> <p>2.2 Radio Architectures 34</p> <p>2.3 SDR Building Blocks 34</p> <p>2.4 Example of an SDR Transceiver 54</p> <p>References 60</p> <p><b>3 Adaptive Multi-Mode RF Front-End Circuits 65<br /> </b><i>Aleksandar Tasic</i></p> <p>3.1 Introduction 65</p> <p>3.2 Adaptive Multi-Mode Low-Power Wireless RF IC Design 66</p> <p>3.3 Multi-Mode Receiver Concept 68</p> <p>3.4 Design of a Multi-Mode Adaptive RF Front End 70</p> <p>3.5 Experimental Results for the Image-Reject Down-Converter 76</p> <p>3.6 Conclusions 80</p> <p>References 81</p> <p><b>4 Precise Delay Alignment Between Amplitude and Phase/ Frequency Modulation Paths in a Digital Polar Transmitter 85<br /> </b><i>Khurram Waheed and Robert Bogdan Staszewski</i></p> <p>4.1 Introduction 85</p> <p>4.2 RF Polar Transmitter in Nanoscale CMOS 87</p> <p>4.3 Amplitude and Phase Modulation 90</p> <p>4.4 Mechanisms to Achieve Subnanosecond Amplitude and Phase Modulation Path Alignments 96</p> <p>4.5 Precise Alignment of Multi-Rate Direct and Reference Point Data 101</p> <p>References 109</p> <p><b>5 Overview of Front-End RF Passive Integration into SoCs 113<br /> </b><i>Hooman Darabi</i></p> <p>5.1 Introduction 113</p> <p>5.2 The Concept of a Receiver Translational Loop 119</p> <p>5.3 Feedforward Loop Nonideal Effects 122</p> <p>5.4 Feedforward Receiver Circuit Implementations 125</p> <p>5.5 Feedforward Receiver Experimental Results 129</p> <p>5.6 Feedback Notch Filtering for a WCDMA Transmitter 133</p> <p>5.7 Feedback-Based Transmitter Stability Analysis 138</p> <p>5.8 Impacts of Nonidealities in Feedback-Based Transmission 141</p> <p>5.9 Transmitter Building Blocks 148</p> <p>5.10 Feedback-Based Transmitter Measurement Results 150</p> <p>5.11 Conclusions and Discussion 153</p> <p>Appendix 155</p> <p>References 156</p> <p><b>6 ADCs and DACs for Software-Defined Radio 159<br /> </b><i>Michiel Steyaert, Pieter Palmers, and Koen Cornelissens</i></p> <p>6.1 Introduction 159</p> <p>6.2 ADC and DAC Requirements in Wireless Systems 160</p> <p>6.3 Multi-Standard Transceiver Architectures 162</p> <p>6.4 Evaluating Reconfigurability 165</p> <p>6.5 ADCs for Software-Defined Radio 166</p> <p>6.6 DACs for Software-Defined Radio 172</p> <p>6.7 Conclusions 184</p> <p>References 184</p> <p><b>II Receiver Design 187</b></p> <p><b>7 OFDM Transform-Domain Receivers for Multi-Standard Communications 189<br /> </b><i>Sebastian Hoyos</i></p> <p>7.1 Introduction 189</p> <p>7.2 Transform-Domain Receiver Background 190</p> <p>7.3 Transform-Domain Sampling Receiver 191</p> <p>7.4 Digital Baseband Design for the TD Receiver 195</p> <p>7.5 A Comparative Study 204</p> <p>7.6 Simulations 208</p> <p>7.7 Gain–Bandwidth Product Requirement for an Op-Amp in a Charge-Sampling Circuit 211</p> <p>7.8 Sparsity of (<i>G^HG</i>)⁻¹213</p> <p>7.9 Applications 214</p> <p>7.10 Conclusions 215</p> <p>References 216</p> <p><b>8 Discrete-Time Processing of RF Signals 219<br /> </b><i>Renaldi Winoto and Borivoje Nikolic</i></p> <p>8.1 Introduction 219</p> <p>8.2 Scaling of an MOS Switch 221</p> <p>8.3 Sampling Mixer 223</p> <p>8.4 Filter Synthesis 226</p> <p>8.5 Noise in Switched-Capacitor Filters 234</p> <p>8.6 Circuit-Design Considerations 237</p> <p>8.7 Perspective and Outlook 242</p> <p>References 244</p> <p><b>9 Oversampled ADC Using VCO-Based Quantizers 247<br /> </b><i>Matthew Z. Straayer and Michael H. Perrott</i></p> <p>9.1 Introduction 247</p> <p>9.2 VCO-Quantizer Background 248</p> <p>9.3 SNDR Limitations for VCO-Based Quantization 252</p> <p>9.4 VCO Quantizer ΣΔ ADC Architecture 257</p> <p>9.5 Prototype ΣΔ ADC Example with a VCO Quantizer 265</p> <p>9.6 Conclusions 275</p> <p>References 276</p> <p><b>10 Reduced External Hardware and Reconfigurable RF Receiver Front Ends for Wireless Mobile Terminals 279<br /> </b><i>Naveen K. Yanduru</i></p> <p>10.1 Introduction 279</p> <p>10.2 Mobile Terminal Challenges 280</p> <p>10.3 Research Directions Toward a Multi-Band Receiver 282</p> <p>10.4 Multi-Mode Receiver Principles and RF System Analysis for a W-CDMA Receiver 286</p> <p>10.5 W-CDMA, GSM/GPRS/EDGE Receiver Front End Without an Interstage SAW Filter 292</p> <p>10.6 Highly Integrated GPS Front End for Cellular Applications in 90-nm CMOS 299</p> <p>10.7 RX Front-End Performance Comparison 305</p> <p>References 305</p> <p><b>11 Digitally Enhanced Alternate Path Linearization of RF Receivers 309<br /> </b><i>Edward A.Keehr and Ali Hajimiri</i></p> <p>11.1 Introduction 309</p> <p>11.2 Adaptive Feedforward Error Cancellation 311</p> <p>11.3 Architectural Concepts 313</p> <p>11.4 Alternate Feedforward Path Block Design Considerations 320</p> <p>11.5 Experimental Design of an Adaptively Linearized UMTS Receiver 331</p> <p>11.6 Experimental Results of an Adaptively Linearized UMTS Receiver 336</p> <p>11.7 Conclusions 341</p> <p>References 343</p> <p><b>III Transmitter Techniques 347</b></p> <p><b>12 Linearity and Efficiency Strategies for Next-Generation Wireless Communications 349<br /> </b><i>Lawrence Larson, Peter Asbeck, and Donald Kimball</i></p> <p>12.1 Introduction 349</p> <p>12.2 Power Amplifier Function 349</p> <p>12.3 Power Amplifier Efficiency Enhancement 354</p> <p>12.4 Techniques for Linearity Enhancement 362</p> <p>12.5 Conclusions 371</p> <p>References 372</p> <p><b>13 CMOS RF Power Amplifiers for Mobile Communications 377<br /> </b><i>Patrick Reynaert</i></p> <p>13.1 Introduction 377</p> <p>13.2 Challenges 378</p> <p>13.3 Low Supply Voltage 378</p> <p>13.4 Average Efficiency, Dynamic Range, and Linearity 381</p> <p>13.5 Polar Modulation 386</p> <p>13.6 Distortion in a Polar-Modulated Power Amplifier 390</p> <p>13.7 Design and Implementation of a Polar-Modulated Power Amplifier 397</p> <p>13.8 Conclusions 408</p> <p>References 408</p> <p><b>14 Digitally Assisted RF Architectures: Two Illustrative Designs 411<br /> </b><i>Joel L. Dawson</i></p> <p>14.1 Introduction 411</p> <p>14.2 Cartesian Feedback: The Analog Problem 412</p> <p>14.3 Digital Assistance for Cartesian Feedback 416</p> <p>14.4 Multipliers, Squarers, Mixers, and VGAs: The Analog Problem 427</p> <p>14.5 Digital Assistance for Analog Multipliers 429</p> <p>14.6 Summary 435</p> <p>Appendix: Stability Analysis for Cartesian Feedback Systems 436</p> <p>References 447</p> <p><b>IV Digital Signal Processing for RF Transceivers 451</b></p> <p><b>15 RF Impairment Compensation for Future Radio Systems 453<br /> </b><i>Mikko Valkama</i></p> <p>15.1 Introduction and Motivation 453</p> <p>15.2 Typical RF Impairments 454</p> <p>15.3 Impairment Mitigation Principles 469</p> <p>15.4 Case Studies in <i>I/Q </i>Imbalance Compensation 480</p> <p>15.5 Conclusions 487</p> <p>References 488</p> <p><b>16 Techniques for the Analysis of Digital Bang-Bang PLLs 497<br /> </b><i>Nicola Da Dalt</i></p> <p>16.1 Introduction 497</p> <p>16.2 Digital Bang-Bang PLL Architecture 498</p> <p>16.3 Analysis of the Nonlinear Dynamics of the BBPLL 499</p> <p>16.4 Analysis of the BBPLL with Markov Chains 503</p> <p>16.5 Linearization of the BBPLL 508</p> <p>16.6 Comparison of Measurements and Models 526</p> <p>References 531</p> <p><b>17 Low-Power Spectrum Processors for Cognitive Radios 533<br /> </b><i>Joy Laskar and Kyutae Lim</i></p> <p>17.1 Introduction 533</p> <p>17.2 Paradigm Shift from SDR to CR 534</p> <p>17.3 Challenge and Trends in RFIC/System 535</p> <p>17.4 Analog Signal Processing 536</p> <p>17.5 Spectrum Sensing 537</p> <p>17.6 Multi-Resolution Spectrum Sensing 538</p> <p>17.7 MRSS Performance 542</p> <p>17.8 Conclusions 555</p> <p>References 556</p> <p>Index 557</p>

<p><b>GERNOT HUEBER</b> earned his PhD at the University of Linz, Austria, in 2006. His thesis was "Advanced Concept and Design of Multi-Mode/Multi-System Receivers for Cellular Terminal RFICs." Dr.??Hueber is head of RF Innovations group at DICE GmbH & Co. KG in Linz, Austria, with main responsibility for the research in cellular transceivers. <p><b>ROBERT BOGDAN STASZEWSKI</b> is a senior design engineer and researcher with over eighteen years of diverse industrial experience in microelectronics and communication systems. Dr. Staszewski earned his PhD in electrical engineering at the University of Texas at Dallas, in 2002, for his work on all-digital PLLs. He is currently Associate Professor at Delft University of Technology in the Netherlands. He is an IEEE Fellow.

<p><b>STATE-OF-THE-ART AND BEYOND TECHNOLOGIES TO BE USED IN FUTURE MULTI-MODE WIRELESS COMMUNICATION SYSTEMS</b> <p>Current and future mobile terminals become increasingly complex because they have to deal with a variety of frequency bands and communication standards. Achieving multiband/multimode functionality (3G and beyond) is especially challenging for the RF-transceiver section. <p>This volume presents cutting-edge physical layer technologies for multi-mode wireless RF transceivers, specifically RF, analog, and mixed-signal and digital circuits and architectures. Providing the most comprehensive treatment of this topic available, it features original contributions from distinguished researchers and professionals from both academia and industry, who anticipate the major trends and needs of future wireless system developments. <p>Divided into four sections, <i>Multi-Mode/Multi-Band RF Transceivers for Wireless Communications</i> covers: <ul> <li>Transceiver concepts and design: software-defined radio front-ends/transceivers, adaptive multi-mode RF front-end circuits, delay alignment between amplitude and phase paths in a digital polar transmitter, and front-end RF passive integration, as well as versatile data converters</li> <li>Receiver design: OFDM transform-domain receivers for multi-standards, discrete-time processing of RF signals, oversampled ADC using VCO-based quantizers, RF receiver front-ends for mobile terminals, and digitally enhanced alternate path linearization of RF receivers</li> <li>Transmitter techniques: Linearity and efficiency strategies, CMOS RF power amplifiers for mobiles, and digitally assisted RF architectures</li> <li>Digital Signal Processing for RF transceivers: RF impairment compensation for future radio systems, techniques for the analysis of digital bang-bang PLLs, and low-power spectrum processors for cognitive radios</li> </ul> <p>The remarkable insight into the essential transceiver building blocks to be used in future multi-mode wireless communication systems makes this an invaluable resource for engineers and researchers from academia and industry working on circuits and architectures of wireless transceivers, as well as for RF design engineers in semiconductor companies and graduate students taking advanced courses on wireless communication circuits.

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