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<b>Volume I</b> <p>Preface.</p> <p>List of Contributors.</p> <p>1. Introduction to 3D Integration (Philip Garrou).</p> <p>2. Drivers for 3D Integration (Philip Garrou, Susan Vitkavage, and Sitaram Arkalgud).</p> <p>3. Overview of 3D Integration Process Technology (Philip Garou and Christopher Bower).</p> <p><b>I: Through Silicon Via Fabrication.</b></p> <p>4. Deep Reactive Ion Etching of Through Silicon Vias (Fred Roozeboom, Michiel A. Blauw, Yann Lamy, Eric van Grunsven, Wouter Dekkers, Jan F. Verhoeven, Eric (F.) van den Heuvel, Emile van der Drift, Erwin (W.M.M.) Kessels, and Richard (M.C.M.) van de Sanden).</p> <p>5. Laser Ablation (Wei-Chung Lo and S.M. Chang).</p> <p>6. SiO₂.</p> <p>7. Insulation - Organic Dielectrics (Philip Garrou and Christopher Bower).</p> <p>8. Copper Plating (Tom Ritzdorf, Rozalia Beica, and Charles Sharbono).</p> <p>9. Metallization by Chemical Vapor Deposition of W and Cu (Armin Klumpp, Robert Wieland, Ramona Ecke, and Stefan E. Schulz).</p> <p><b>II: Wafer Thinning and Bonding Technology.</b></p> <p>10. Fabrication, Processing and Singulation of Thin Wafers (Werner Kroninger).</p> <p>11. Overview of Bonding Technologies for 3D Integration (Jean-Pierre Joly).</p> <p>12. Chip-to-Wafer and Wafer-to-Wafer Integration Schemes (Thorsten Matthias, Stefan Parfgrieder, Markus Wimplinger, and Paul Lindner).</p> <p>13. Polymer Adhesive Bonding Technology (James Jian-Wiang Lu, Tim S. Cale, and Ronald J. Gutmann).</p> <p>14. Bonding with Intermetallic Compounds (Armin Klumpp).</p> <p><b>Volume 2</b></p> <p><b>III: Integration Processes.</b></p> <p>15. Commercial Activity (Philip Garrou).</p> <p>16. Wafer-Level 3D System Integration (Peter Ramm, M. Jurgen Wolf, and Bernhard Wunderle).</p> <p>17. Interconnect Process at the University of Arkansas (Susan Burkett and Leonard Schaper).</p> <p>18. Vertical Interconnection by ASET (Kenji Takahashi and Kazumasa Tanida).</p> <p>19. 3D Integration at CEA-LETI (Barbara Charlet, Lea Di Cioccio, Patrick Leduc, and David Henry).</p> <p>20. Lincoln Laboratory's 3D Circuit Integration Technology (James Burns, Brian Aull, Robert Berger, Nisha Checka, Chang-Lee Chen, Chenson Chen, Pascale Gouker, Craig Keast, Jeffrey Knecht, Antonio Soares, Vyshnavi Suntharalingam, Vrian Tyrrell, Keith Warner, Bruce Wheeler, Peter Wyatt, and Donna Yost).</p> <p>21. 3D Integration Technologies at IMEC (Eric Beyne).</p> <p>22. Fabrication Using Copper Thermo-Compression Bonding at MIT (Chuan Seng Tan, Andy Fan, and Rafael Reif).</p> <p>23. Rensselaer 3D Integration Processes (James Jian-Qiang, Lu, Tim S. Cale, and Ronald J. Gutmann).</p> <p>24. 3D Integration at Tezzaron Semiconductor Corporation (Robert Patti).</p> <p>25. 3D Integration at Ziptronix, Inc. (Paul Enquist).</p> <p>26. 3D Integration ZyCube (Makoto Motoyoshi).</p> <p><b>IV: Design , Performance, and thermal Management.</b></p> <p>27. Design for  3D Integration at North Carolina State University (Paul D. Franzon).</p> <p>28. Modeling Approaches and Design Methods for 3D System Design (Peter Schneider and Gunter Elst).</p> <p>29. Multiproject Circuit Design and Layout in Lincoln Laboratory's 3D Technology (James Burns, Robert Berger, Nisha Checka, Craig Keast, Brian Tyrrell, and Bruce Wheeler).</p> <p>30. Computer-Aided Design for 3D Circuits at the University of Minnesota (Sachin S. Sapatnekar).</p> <p>31. Electrical Performance of 3D Circuits (Arne Heittmann and Ulrich Ramacher).</p> <p>32. Testing of 3D Circuits (T.M. Mak).</p> <p>33. Thermal Management of Vertically Integrated Packages (Thomas Brunschwiler and Bruno Michel).</p> <p><b>V: Applications.</b></p> <p>34. 3D and Microprocessors (Pat Morrow and Sriram Muthukumar).</p> <p>35. 3D Memories (Mark Tuttle).</p> <p>36. 3D Read-Out Integrated Circuits for Advanced Sensor Arrays (Christopher Bower).</p> <p>37. Power Devices (Marc de Samber, Eric van Grunsven, and David Heyes).</p> <p>38. Wireless Sensor Systems - The e-CUBES Project (Adrian M. Ionescu, Eric Beyne, Tierry Hilt, Thomas Herndl, Pierre Nicole, Nihai Sanduleanu, Anton Sauer, Herbert Shea, Maaike Taklo, Co Van Veen, Josef Weer, Werner Weber, Jurgen M. Wolf, and Peter Ramm).</p> <p>Conclusions (Phil Garrou, Christopher Bower, and Peter Ramm).</p> <p>Index.</p>

<b>Dr. Philip Garrou</b>, from Microelectronic Consultants of North Carolina, specializes in thin film microelectronic materials and applications, prior to which he was Director of Technology and New Business Development for Dow Chemicals' Advanced Electronic Materials business. He is a fellow of IEEE and IMAPS, has served as Associate Editor of the IEEE Transactions on Advanced Packaging, has authored two microelectronics texts and is co-author of over 75 peer reviewed publications and book chapters. <p><b>Dr. Christopher A. Bower</b> is Senior Research Scientists at Semprius Inc., Durham, NC, where he works on heterogeneous integration of compound semiconductor devices. He previously held positions at Inplane Photonics as a senior process development engineer and as a scientist at RTI International, where he participated in multiple DARPA-funded 3D integration programs. Dr. Bower has authored or co-authored over 40 peer-reviewed publications and holds 2 U.S. patents.</p> <p><b>Dr. Peter Ramm</b> is head of the silicon technology department of Fraunhofer IZM in Munich, Germany, where he is responsible for process integration of innovative devices and new materials. Peter Ramm received the physics and Dr. rer. nat. degrees from the University of Regensburg and subsequently worked for Siemens in the DRAM facility. In 1988 he joined Fraunhofer IFT in Munich, focusing since two decades on 3D integration technologies. Dr. Ramm is author or co-author of more than 50 papers and 20 patents.</p>

The first encompassing treatise of this new and very important field puts the known physical limitations for classic 2D microelectronics into perspective with the requirements for further microelectronics developments and market necessities. This two- volume handbook presents 3D solutions to the feature density problem, addressing all important issues, such as wafer processing, die bonding, packaging technology, and thermal aspects. It begins with an introductory part, which defines necessary goals, existing issues and relates 3D integration to the semiconductor roadmap of the industry. Before going on to cover processing technology and 3D structure fabrication strategies in detail. This is followed by fields of application and a look at the future of 3D integration.<br /> <p>The editors have assembled contributions from key academic and industrial players in the field, including Intel, Micron, IBM, Infineon, Qimonda, NXP, Philips, Toshiba, Semitool, EVG, Tezzaron, Lincoln Labs, Fraunhofer, RPI, IMEC, CEA-LETI and many others.</p>

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