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<p>Preface xxvii</p> <p>Acknowledgments</p> <p>1 Overview of Embedded System 1</p> <p><b>Part I: Basic Digital Circuits Development</b></p> <p>2 Gate-level Combinational Circuit 11</p> <p>3 Overview of FPGA and EDA Software 25</p> <p>4 RT-level Combinational Circuit 53</p> <p>5 Regular Sequential Circuit 93</p> <p>6 FSM 137</p> <p>7 FSMD 155</p> <p>8 Selected Topics of Verilog 188</p> <p><b>Part II: Basic Nois II Software Development</b></p> <p>9 Nios II Processor Overview 229</p> <p>10 NIOS II System Derivation and Low-Level Access 237</p> <p>11 Predesigned Nios II I/O Peripherals 265  </p> <p>12 Predesigned Nios II I/O Drivers and HAL API 303</p> <p>13 Interrupt and ISR 325</p> <p><b>Part III: Custom I/O Peripheral Development </b></p> <p>14 Custom I/O Peripheral with PIO Cores 345</p> <p>15 Avalon Interconnect and SOPC Component 351</p> <p>16 SRAM and SDRAM Controllers 385</p> <p>17 PS2 Keyboard and Mouse 423</p> <p>18 VGA Controller 475</p> <p>19 Audio Codec Controller 555</p> <p>20 SD Card Controller 601</p> <p><b>Part IV: Hardware Acclerator Case Studies</b></p> <p>21 GCD Accelerator 663</p> <p>22 Mandelbrot Set Fractal Accelerator 681</p> <p>23 Direct Digital Frequency Synthesis 715</p> <p>References 741</p> <p>Topic Index 745</p>

<p><b>D<small>R</small>. PONG P. CHU</b> is Associate Professor in the Department of Electrical and Computer Engineering at Cleveland State University in Ohio. He has taught undergraduate- and graduate-level digital systems and computer architecture courses for more than a decade and has received instructional grants from the National Science Foundation and Cleveland State University.

<p><b>Explores the unique hardware programmability of FPGA-based embedded systems, using a learn-by-doing approach to introduce the concepts and techniques for embedded SoPC design with Verilog</b> <p>An SoPC (system on a programmable chip) integrates a processor, memory modules, I/O peripherals, and custom hardware accelerators into a single FPGA (field-programmable gate array) device. In addition to the customized software, customized hardware can be developed and incorporated into the embedded system as well—allowing us to configure the soft-core processor, create tailored I/O interfaces, and develop specialized hardware accelerators for computation-intensive tasks. <p>Utilizing an Altera FPGA prototyping board and its Nios II soft-core processor, <i>Embedded SoPC Design with Nios II Processor and Verilog Examples</i> takes a "learn by doing" approach to illustrate the hardware and software design and development process by including realistic projects that can be implemented and tested on the board. <p>Emphasizing hardware design and integration throughout, the book is divided into four major parts: <ul> <li>Part I covers HDL and synthesis of custom hardware</li> <li>Part II introduces the Nios II processor and provides an overview of embedded software development</li> <li>Part III demonstrates the design and development of hardware and software of several complex I/O peripherals, including a PS2 keyboard and mouse, a graphic video controller, an audio codec, and an SD (secure digital) card</li> <li>Part IV provides several case studies of the integration of hardware accelerators, including a custom GCD (greatest common divisor) circuit, a Mandelbrot set fractal circuit, and an audio synthesizer based on DDFS (direct digital frequency synthesis) methodology</li> </ul> <p>While designing and developing an embedded SoPC can be rewarding, the learning can be a long and winding journey. This book shows the trail ahead and guides readers through the initial steps to exploit the full potential of this emerging methodology.

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