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<p>Preface ix</p> <p><b>Chapter 1. Synchronous Finite State Machines  1</b></p> <p>1.1. Introduction  1</p> <p>1.2. State diagram  2</p> <p>1.3. Design of synchronous finite state machines  6</p> <p>1.4. Examples  7</p> <p>1.4.1. Flip-flops  7</p> <p>1.4.2. Binary sequence detector 12</p> <p>1.4.3. State machine implementation based on a state table 21</p> <p>1.4.4. Variable width pulse generator  22</p> <p>1.5. Equivalent states and minimization of the number of states  27</p> <p>1.5.1. Implication table method 28</p> <p>1.5.2. Partitioning method  37</p> <p>1.5.3. Simplification of incompletely specified machines 42</p> <p>1.6. State encoding 55</p> <p>1.7. Transformation of Moore and Mealy state machines  61</p> <p>1.8. Splitting finite state machines  63</p> <p>1.8.1. Rules for splitting 63</p> <p>1.8.2. Example 1 64</p> <p>1.8.3. Example 2 67</p> <p>1.9. Sequence detector implementation based on a programmable circuit  68</p> <p>1.10. Practical considerations 70</p> <p>1.10.1. Propagation delays and race conditions . 72</p> <p>1.10.2. Timing specifications  74</p> <p>1.11. Exercises 79</p> <p>1.12. Solutions 97</p> <p><b>Chapter 2. Algorithmic State Machines  169</b></p> <p>2.1. Introduction  169</p> <p>2.2. Structure of an ASM 169</p> <p>2.3. ASM chart 170</p> <p>2.4. Applications  175</p> <p>2.4.1. Serial adder/subtracter  175</p> <p>2.4.2. Multiplier based on addition and shift operations 183</p> <p>2.4.3. Divider based on subtraction and shift operations 187</p> <p>2.4.4. Controller for an automatic vending machine  189</p> <p>2.4.5. Traffic light controller 193</p> <p>2.5. Exercises  200</p> <p>2.6. Solutions  205</p> <p><b>Chapter 3. Asynchronous Finite State Machines  213</b></p> <p>3.1. Introduction  213</p> <p>3.2. Overview  214</p> <p>3.3. Gated D latch  214</p> <p>3.4. Muller C-element 218</p> <p>3.5. Self-timed circuit 220</p> <p>3.6. Encoding the states of an asynchronous state machine 224</p> <p>3.7. Synthesis of asynchronous circuits  227</p> <p>3.7.1. Oscillatory cycle  227</p> <p>3.7.2. Essential and d-trio hazards 228</p> <p>3.7.3. Design of asynchronous state machines 239</p> <p>3.8. Application examples of asynchronous state machines  240</p> <p>3.8.1. Pulse synchronizer 240</p> <p>3.8.2. Asynchronous counter  243</p> <p>3.9. Implementation of asynchronous machines using SR latches or C-elements 247</p> <p>3.10. Asynchronous state machine operating in pulse mode  251</p> <p>3.11. Asynchronous state machine operating in burst mode  256</p> <p>3.12. Exercises 258</p> <p>3.13. Solutions 266</p> <p>Appendix. Overview of VHDL Language 287</p> <p>A.1. Introduction  287</p> <p>A.2. Principles of VHDL  287</p> <p>A.2.1. Names 288</p> <p>A.2.2. Comments 288</p> <p>A.2.3. Library and packages 289</p> <p>A.2.4. Ports  289</p> <p>A.2.5. Signal and variable  289</p> <p>A.2.6. Data types and objects  289</p> <p>A.2.7. Attributes 290</p> <p>A.2.8. Entity and architecture  291</p> <p>A.3. Concurrent instructions  292</p> <p>A.3.1. Concurrent instructions with selective assignment  293</p> <p>A.3.2. Concurrent instructions with conditional assignment 293</p> <p>A.4. Components  294</p> <p>A.4.1. Generics  296</p> <p>A.4.2. The GENERATE Instruction  296</p> <p>A.4.3. Process 297</p> <p>A.5. Sequential structures 298</p> <p>A.5.1. The IF instruction 298</p> <p>A.5.2. CASE instruction 303</p> <p>A.6. Testbench 306</p> <p>Bibliography 311</p> <p>Index  313</p>

<p><b>Tertulien Ndjountche</b> received a PhD degree in electrical engineering from Erlangen-Nuremberg University in Germany. He has worked as a professor and researcher at universities in Germany and Canada. He has published numerous technical papers and books in his fields of interest.</p>

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